The Life of a CPU Instruction

Explore the intricate journey of a CPU instruction in this informative conference talk from code::dive 2019. Delve into the complex world of modern CPU architecture, learning about out-of-order execution, caching, and branch prediction. Follow an instruction's path through the CPU pipeline, gaining insights into the evolution of processors from the Intel 8086 to modern innovations. Discover the challenges faced by early CPU designs and how they were overcome, including the introduction of speculative execution. Gain a comprehensive understanding of CPU terminology, CISC and RISC architectures, and the differences between x86 and ARM processors. Benefit from speaker Borislav Stanimirov's 15 years of C++ programming experience across various platforms as he breaks down complex concepts into accessible explanations. Conclude with bonus information on hyperthreading and access to additional materials for further study.

Intro
Hello, World
About this talk
Basic terminology
Other stuff
Types of CPUs
CISC and RISC: x86 and ARM
1978: Intel 8086
The life of an instruction on 8086
Modern innovations
Problems with the 486 pipeline
Pentium: The Savior
Speculative execution
Now we know
Some materials
Bonus: Hyperthreading