Journey to the Centre of the JVM - Exploring CPU Architecture and Memory Models

Embark on a deep dive into the intricate world of CPU architecture, memory models, and JVM intrinsics through the lens of high-level functional abstractions in this 59-minute conference talk. Follow Daniel Spiewak's journey as he unravels the most complex and mind-bending bug hunt of his career, exploring platform-specific, processor-specific, and even architecture-version-specific implementations. Discover the challenges of tracking down nondeterministic bugs in Scala-based implementations that only manifest on certain hardware. Gain insights into topics such as fibers, fiber implementation, cancel actions, memory access, volatile variables, ARM architecture, CISC vs. RISC, Cats Effect, race conditions, and the intricacies of compare-and-set operations. Learn about the stages of grief in debugging, performance considerations, and the complexities of cancellation actions. Conclude with a comparison of Go and Rust, and understand why performance is not a one-size-fits-all solution in the realm of JVM optimization.

Introduction
Introduction to Daniel
Thanks to Ross Hassan
Fibers
Fiber Implementation
Cancel Action
Memory Access
Example
Volatile variables
Suspended
Cancel
Arm
Cisc vs Risk
Cats Effect
Race Condition
Cancellation Action
Race Conditions
Stages of Grief
The Issue
Compare and Set
Compare and Set x86
Conclusion
Questions
Scala
Worst Bug
Out of spec
Cancel not volatile
Timeline
Performance is not a onesizefitsall
Go vs Rust