PLIP- Partial Reconfiguration of Spartan 6 FPGA

Learn how to implement Partial Reconfiguration on Spartan 6 FPGA in this 24-minute tutorial by Colin O'Flynn. Explore the PLIP (Programmable Logic In Practice) technique, targeting the Avnet LX9 MicroBoard. Dive into topics such as FPGA Editor, Output Block, Reconfiguration, Python examples, and DCM (Digital Clock Manager) implementation. Access full details, code examples, and additional resources through the provided links. Follow along with the step-by-step process, from introduction to the final example, to master this advanced FPGA programming technique.

Introduction
Example
Setup
FPGA Editor
Output Block
Reconfig
Python example
DCM example
Final example