Linux on RISC-V with Open Hardware

Explore the world of RISC-V and open hardware in this comprehensive conference talk by Drew Fustini from BeagleBoard.org Foundation. Delve into the fundamentals of RISC-V architecture, including its base integer ISA and standard extensions, and understand how it differs from other instruction set architectures. Learn about RISC-V's impact on industry, its privileged architecture, and boot flow. Discover the role of OpenSBI and UEFI support in RISC-V systems. Gain insights into RISC-V implementation in the Linux kernel and explore various Linux distributions compatible with RISC-V. Examine popular RISC-V hardware platforms, including SiFive Freedom Unleashed, Microchip PolarFire SoC, and SAVVY-V board. Investigate open-source FPGA toolchains and the concept of designing SoCs using Python. Conclude with a discussion on trustworthy self-hosted computers and the significance of open hardware in the RISC-V ecosystem.

Intro
RISC-V (virtual) meetups around the world
Open Source Hardware
Instruction Set Architecture (ISA)
What is different about RISC-V?
RISC-V Base Integer ISA
RISC-V Standard Extensions
RISC-V and Industry
Is RISC-V an Open Source processor?
RISC-V Privileged Architecture
RISC-V Boot Flow
What is OpenSBI?
UEFI Support
RISC-V in the Linux kernel
Linux distro: Fedora
Linux distro: Debian
SiFive Freedom Unleashed
Microchip PolarFire SoC
Microchip Icicle board
SAVVY-V board
Kendryte K210
SiFive Unmatched
Sipeed board with Allwinner SoC
Open source FPGA toolchains
Team Linux on Badge
Why design an SoC in Python?
Open Source ECP5 FPGA boards
Trustworthy self-hosted computer