Base Porting of Linux Kernel on RISC-V Architecture

Explore the fundamentals of porting the Linux kernel to RISC-V architecture in this 35-minute conference talk by G Satish Kumar from Cavium Networks. Gain insights into the minimal kernel support required, initial address setup, and essential macros used for hardware interaction. Learn about ZTEXT_ADDRESS, ZRAM_ADDRESS, ZBASE_ADDRESS, and the initialization of minimal controllers for RISC-V board bring-up. Discover the basics of RISC-V ISA, terminology specific to SiFive boards, and the booting process for SiFive kernels. Delve into early boot procedures, setup_arch implementation, SMP initialization, and shutdown mechanisms using SBI. Examine traps, timer interrupts, paging, and MMU in the SiFive kernel context. Acquire practical knowledge for debugging early issues in board bring-up and prepare for the anticipated influx of RISC-V boards from various vendors.

Intro
Basics of RISC VISA
Terminology in SiFive Boards
Booting SiFive Kernel
Early boot in SiFive Boards
setup_arch in SiFive
SMP init in SiFive Linux
Shut Down using SBI
Traps in SiFive Kernel
Timer Interrupt in SiFive Kernel
Paging & MMU in SiFive
SiFive Kernel on Qemu
Reference