VLSI Design Flow: RTL to GDS - Course Introduction
Offered By: NPTEL-NOC IITM via YouTube
Course Description
Overview
Explore the fundamentals of VLSI design flow from RTL to GDS in this introductory video lecture presented by Prof. Sneh Saurabh from the Electronics and Communication Engineering department at IIIT Delhi. Gain insights into the course structure and key concepts that will be covered throughout the program, providing a solid foundation for understanding the intricate process of transforming Register Transfer Level (RTL) designs into final chip layouts using GDSII format.
Syllabus
VLSI Design Flow: RTL to GDS - Course Intro
Taught by
NPTEL-NOC IITM
Related Courses
VLSI - Essential concepts and detailed interview guideUdemy VSD - Physical Design Flow
Udemy Stanford Seminar - Neural Networks on Chip Design from the User Perspective
Stanford University via YouTube Electronic Design Automation and the Resurgence of Chip Design
Stanford University via YouTube Stanford Seminar - Low-Cost 3D Chip Stacking with ThruChip Wireless Connections
Stanford University via YouTube