Verifiable ASICs

Explore the concept of verifiable ASICs in this 20-minute conference talk presented at the 2016 IEEE Symposium on Security & Privacy. Delve into the challenges of ensuring high-assurance execution in custom hardware manufacturing and discover an innovative approach using verifiable computation. Learn about the Zebra system, which implements physically realizable, area-efficient, high-throughput ASICs for prover and verifier roles. Understand how this method allows untrusted ASICs to compute proofs of correct execution, verified by trusted processors or ASICs, potentially offering performance advantages over direct execution on trusted platforms. Gain insights into the design process, including new observations about the CMT protocol, hardware design considerations, and architectural challenges addressed in the implementation.

Verifiable ASICs