Universal Tools for Acceleration, Timing, Integration & Machine Enhancement

Explore a conference talk on accelerating Open ISA processors and implementing specialized compute functions. Learn about the reasons, open source tools, and methods for enhancing processor performance. Discover the evolution of the processor industry, the importance of instruction sets, and the benefits of RISC-V architecture. Dive into topics such as compiler support, simulation techniques, and development boards. Gain insights into LiteX infrastructure, remote debugging, and various software platforms including MicroPython, Zephyr, and Linux. Understand the potential of FPGA bitstreams and accelerated designs across different processor architectures.

Intro
Hasjim Williams
Floods - let's be prepared Kayak
Evolution of Processor Industry - 1990s
Evolution of Processor Industry - Today
Why Instruction Set Matters
Open Software/Standards Work! Standard
RISC-V Base Instructions
RISC-V Extensions
RISC-V Custom Instructions
Compiler Support - New Instructions / Co-processor
Why Open-Source the Freedom Platform? SiFive FOSDEM 2018
RISC-V Community Member - Benefits
Simulation using Verilator
LiteX Provide the infrastructure to create complex SoCs with Python/Migen
Combinational
Finite State Machines
Remote control and debugging in LiteX
Bridge Advantage
LiteX sim & Verilator
Arty Devboard
Glasgow Interface Explorer / Scotts Army Knife
MicroPython and CircuitPython
Bare-Metal C
Zephyr
Linux on LiteX
QEMU
SymbiFlow - Reverse Engineered FPGA Bitstreams
Accelerate your design
x86-64 Surfboard
Dual ARM powered
RISC-V powered Jet Ski?
HAL 9000
Terminator
Carl's Draperies
Back to the Topic
Holoverse - Dinosaurs
Hewlogram