Stanford Seminar - Thunderclap & CHERI - Capability Hardware-Enhanced RISC Instructions

Explore cutting-edge research on I/O security and hardware-enhanced instruction sets in this Stanford seminar featuring Peter Neumann from SRI International. Dive into two interconnected topics: Thunderclap, a research platform for investigating vulnerabilities in operating system IOMMU protection, and CHERI (Capability Hardware-Enhanced RISC Instructions), an ongoing hardware-software development project. Learn about the risks of DMA attacks through Thunderbolt 3 and USB Type-C devices, and discover how current IOMMU protections fall short in the face of malicious network peripherals. Examine vulnerabilities found in major operating systems and understand the complex vulnerability space for IOMMU-exposed shared memory. Gain insights into the CHERI project, which aims to enhance RISC instruction sets with hardware-based capabilities, and explore its potential impact on computer security. Delve into the technical details, research findings, and ongoing developments in these crucial areas of computer security and architecture.

Stanford Seminar - Thunderclap & CHERI (Capability Hardware-Enhanced RISC Instructions)