NetTLP - A Development Platform for PCIe Devices in Software Interacting with Hardware

Explore a 20-minute conference talk from USENIX NSDI '20 that introduces NetTLP, a development platform for PCIe devices enabling software-hardware interaction. Delve into the innovative approach presented by researchers from The University of Tokyo and Keio University, which addresses the challenges of creating networks that support both low-latency and high-bandwidth packet delivery in modern datacenters. Learn about Opera, a dynamic network solution that combines multi-hop forwarding for latency-sensitive traffic with time-varying source-to-destination circuits for bulk flows. Discover how Opera's design implements rapid and deterministic network reconfiguration, creating an expander graph topology that evolves over time to provide bandwidth-efficient single-hop paths between all racks. Gain insights into Opera's performance, including its ability to support low-latency traffic with flow completion times comparable to static topologies while delivering up to 4x the bandwidth for all-to-all traffic and supporting up to 60% higher load for typical datacenter workloads.

NSDI '20 - NetTLP: A Development Platform for PCIe devices in Software Interacting with Hardware