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Cache Side Channel Attacks - CPU Design As A Security Problem

Offered By: Hack In The Box Security Conference via YouTube

Tags

Hack In The Box Security Conference Courses Cybersecurity Courses Cloud Computing Courses Vulnerability Analysis Courses CPU Design Courses

Course Description

Overview

Explore the intricacies of cache side channel attacks and their implications for CPU security in this 54-minute conference talk from the Hack In The Box Security Conference. Delve into how modern computer microarchitecture, particularly the cache subsystem, can be exploited to breach trust boundaries and access private data. Examine the resurgence of cache side channel attacks due to shared caches and cloud computing, and understand why software defenses are challenging yet often the only viable solution. Learn about real-world attack scenarios, including exfiltration of cryptographic keys and spying on user input. Gain insights from Anders Fogh, an experienced engineer and malware expert, as he discusses the mechanics of these attacks, detection methods using performance counters, and potential mitigation strategies.

Syllabus

Intro
Cache Side Channel Attacks
Who am I
Scope
Why is this interesting
How the data cache works
Summary
How is memory stored
Example code
How it works
Cash attacks
Victim time
Prime and Probe
Flush Load
Eject In Time
Shared Memory
Side Channel Attacks
Detecting Side Channels
Performance Counters
Flush Reload
Detecting cache misses
Analyzing the original code
Is the form scan useless
Flush and flush
Detecting flush
Twostage detection
Problems
Mitigation
Questions


Taught by

Hack In The Box Security Conference

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