Co-design Hardware and Algorithm for Vector Search
Offered By: Scalable Parallel Computing Lab, SPCL @ ETH Zurich via YouTube
Course Description
Overview
Explore a groundbreaking approach to vector search acceleration in this 25-minute conference talk from SC'23 in Denver, CO. Delve into the innovative FANNS framework, an end-to-end scalable vector search solution for FPGAs, presented by Wenqi Jiang from the Scalable Parallel Computing Lab at ETH Zurich. Discover how FANNS automatically co-designs hardware and algorithms to meet user-defined recall requirements and hardware resource budgets, generating custom accelerators. Understand the framework's scale-out capabilities through its integrated hardware TCP/IP stack. Learn about the impressive performance gains achieved by FANNS, offering up to 23.0x speedup compared to state-of-the-art CPU implementations. Gain insights into the future of large-scale information retrieval and machine learning systems in the post-Moore's Law era, where accelerated hardware plays a crucial role in meeting increasing performance demands for vector search systems.
Syllabus
Co-design Hardware and Algorithm for Vector Search
Taught by
Scalable Parallel Computing Lab, SPCL @ ETH Zurich
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