AP Power Sequence Subsystem in Zephyr

Explore a comprehensive talk on the AP Power Sequence Subsystem in Zephyr, presented by Bernardo Salvador Perez Priego from Intel Corporation. Dive into the newly introduced subsystem API designed to manage ACPI power sleep states for connected application processors (AP). Learn how to query and receive notifications for AP power state transitions using this API. Discover the subsystem's foundation on Zephyr's State Machine Framework (SMF), offering flexibility for various AP architectures, chipsets, and application-specific requirements. Examine the implementation of ACPI's global state (G3) and six sleep power states (S0-S5) within the state machine domain. Understand the three hierarchical levels of ACPI states: Architecture, Chipset, and Application. Gain insights into utility macros and functions provided for easy hierarchy implementation, state action handler registration, and safe state transitions.

AP Power Sequence Subsystem - Bernardo Salvador Perez Priego, Intel Corporation