A Security RISC - Microarchitectural Attacks on Hardware RISC-V CPUs
Offered By: IEEE via YouTube
Course Description
Overview
Explore microarchitectural attacks on hardware RISC-V CPUs in this 14-minute IEEE conference talk. Delve into the research conducted by experts from CISPA Helmholtz Center for Information Security, including Lukas Gerlach, Daniel Weber, Ruiyi Zhang, and Michael Schwarz. Gain insights into the security risks associated with RISC-V architecture and understand the potential vulnerabilities that can be exploited through microarchitectural attacks. Learn about the implications of these findings for the future of RISC-V CPU design and cybersecurity measures.
Syllabus
A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs
Taught by
IEEE Symposium on Security and Privacy
Tags
Related Courses
Computer ArchitecturePrinceton University via Coursera Introduction to Computer Architecture
Carnegie Mellon University via Independent Build a Modern Computer from First Principles: From Nand to Tetris (Project-Centered Course)
Hebrew University of Jerusalem via Coursera 计算机系统基础（一） ：程序的表示、转换与链接
Nanjing University via Coursera Computer Architecture
Indian Institute of Technology Madras via Swayam