Computer Architecture with an Industrial RISC-V Core [RVfpga]

RISC-V, an open-standard computer architecture, is transforming processor design and software/hardware co-design, including enabling open source hardware implementations. This means that software development can occur alongside hardware development, accelerating the design process. Enroll today to develop your understanding of the RISC-V architecture and its ecosystem and get familiar with the RISC-V cores and system-on-chip.

This course is for junior level or higher university computer science, electrical and computer engineers and other technical students as well as others who would like to learn and experiment with RISC-V.

Upon completion, learners should be able to use RISC-V to improve security, power consumption and performance of processors and help shape the future of computer architecture.

• Welcome!
• Chapter 1. Installation and Initial Demonstrations
• Chapter 2. C Programming with the RVfpga SoC
• Chapter 3. RISC-V Assembly Programming with the RVfpga SoC
• Chapter 4. RISC-V Function Calls
• Chapter 5. Mixing C and Assembly Functions in a Program
• Chapter 6. Introduction to Peripherals and Input/Output
• Chapter 7. More I/O: 7-Segment Displays
• Chapter 8. More I/O: Timers
• Chapter 9. Interrupts
• Chapter 10. Delving Deeper into the RISC-V VeeR Core
• Final Exam (Verified Track only)